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ECEN4827/5827 Announcem ents ã Homework 1 is posted on the course website ã Due (for all students) Friday Sept. 2 ã Handout slides are posted on the…
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ECEN4827/5827 Announcem ents ã Homework 1 is posted on the course website ã Due (for all students) Friday Sept. 2 ã Handout slides are posted on the website before lectures for easier note taking ã Typically posted the day before lecture ã Complete annotated slides will be posted after lectures ã Link to lecture recordings and course blog invitation sent out to students ã Off-campus students: ã Send an email to daniel.costinett@colorado.edu from your preferred email address; otherwise I will use your colorado.edu email ã Use 5827 in the subject line for e-mail questions ã How to succeed in this course: ã Set a fixed schedule: ~10 hours per week ã Stay ahead of lectures: read course notes and text references ã Attend and participate in lectures ã Complete your own assignments ECEN4827/5827 Analog IC Design 1 ANALOG AND MIXED-SIGNAL INTEGRATED CIRCUIT DESIGN TWO-SEMESTER COURSE SEQUENCE Fall 2010: ECEN 4827/5827 Spring 2011: ECEN 4837/5837 ANALOG IC DESIGN MIXED-SIGNAL IC DESIGN LAB This course presents a practical This lab introduces full custom integrated approach to transistor-level design of circuit design for real-world applications analog integrated circuits. Topics include where analog and digital signal ã Real op-amp characteristics, processing meet. Topics include: limitations and impact on design ã Design of analog-to-digital and ã Transistor-level analysis and design digital-to-analog data converters of CMOS amplifiers ã Full custom IC design and layout ã Current and voltage reference ã Final project: group based project circuits targeting a real-world application ã Frequency response, stability and ã Opportunity for fabrication and design-oriented feedback analysis testing of final project IC! ã IC application examples Micro-photograph of a 2mm x 2mm custom IC design in a 0.35u CMOS process ECEN4827/5827 Analog IC Design 2 ECEN4827/5827 Design Tools From Analog IC Design Thurein Paing; Falkenstein, E.A.; Zane, R.; Popovic, Z.; , Custom IC for Ultralow Power RF Energy Scavenging, Power Electronics, IEEE Transactions on , vol.26, no.6, pp.1620-1626, June 2011 ECEN4827/5827 Analog IC Design 3 Im plem entation in Mixed IC Design Thurein Paing; Falkenstein, E.A.; Zane, R.; Popovic, Z.; , Custom IC for Ultralow Power RF Energy Scavenging, Power Electronics, IEEE Transactions on , vol.26, no.6, pp.1620-1626, June 2011 ECEN4827/5827 Analog IC Design 4 ECEN4827/5827 ECEN 4827/ 5827 outline 1. Real op-amp characteristics and limitations, impact on application circuits ã Open-loop gain, input and output impedance, output voltage swing ã Introduction to feedback ã Voltage offset and drift, input bias current and offset ã Introduction to component tolerances and temperature drift ã Input common-mode voltage range, CMRR, PSRR 2. Transistor-level analysis and design of a two-stage CMOS op-amp ã CMOS process technology, 0.35u CMOS process example ã Basic principles of analog IC design via examples: matching, process and temperature variations ã DC biasing ã Small-signal modeling and design of gain stages 3. Current and voltage references ã Current mirrors, design of current sources ã Temperature drift and supply voltage sensitivity ã Bandgap references 4. Frequency responses of gain stages ã Device high-frequency models and parasitic capacitances ã Design-oriented analysis techniques: zero-value time constant (ZVTC) method, and N-extra element theorem (NEET) method 5. Frequency response, stability and design-oriented analysis of negative feedback circuits ã Loop gain, phase margin and compensation 6. IC application examples ã Design of linear voltage regulators ã Design of pulse-width modulation controllers for switched-mode power converters ECEN4827/5827 Analog IC Design 5 Op-am p characteristics _ + Ideal op-amp: ECEN4827/5827 Analog IC Design 6 ECEN4827/5827 Real op -am p characteristics Op-amp data sheets: 10’s of pages Objectives: ã Understand impact of various op-amp imperfections in applications ã Motivate follow- up study of transistor-level design techniques ECEN4827/5827 Analog IC Design 7 (1) DC and low -frequ ency small-signal characteristics ã Open-loop low-frequency voltage gain Ao = vo/(v(+) - v(-)) ã Output resistance, rout ã Input resistance, rin ã Supply voltages VDD, -VSS (or VCC, -VEE); supply currents IDD, ISS (or ICC, IEE) ã Output saturation limits, VOmin, VOmax Output voltage swing VOmin VO VOmax ã Maximum output (source or sink) current ã Input offset voltage, VOS; temperature drift of the input offset voltage VOS/ T [mV/oC] ã Input bias current, IB = (IB+ + IB-)/2; temperature drift IB/ T ã Input offset current, IOS = IB+ - IB-; temperature drift IOS/ T ã Common-mode rejection ratio CMRR ã Power-supply rejection ratio PSRR ã Input common-mode voltage range, VCMmin VCM VCMmax Common-mode input: VCM = (v(+) - v(-))/2 ECEN4827/5827 Analog IC Design 8 ECEN4827/5827 (2) Sm all-signal and large-signal d ynam ic characteristics ã Open-loop transfer function AOL(s) ã Gain-bandwidth product GBW, or unity-gain bandwidth ã Input and output impedances, Zin(s), Zout(s) ã Slew-rate SR ã Frequency-dependent common-mode rejection ratio CMRR(f) ã Frequency-dependent power-supply rejection ratio PSRR(f) ã Input noise ECEN4827/5827 Analog IC Design 9 Ap p lication examp le 1: inverting amp lifier R2 VDD R1 _ vO + vI + – VSS ECEN4827/5827 Analog IC Design 10 ECEN4827/5827 Mod el w ith finite open -loop gain A o + + – Ao(v(+) v( )) ECEN4827/5827 Analog IC Design 11 Mod el w ith finite open -loop gain A o R2 R2 VDD R1 R1 _ vO vo + + + – vi – A (v(+) v( )) vI + o – VSS + ECEN4827/5827 Analog IC Design 12 ECEN4827/5827 R2 Find closed-loop gain ACL = vo/vi R1 vo + + – vi – A (v(+) v( )) o + ECEN4827/5827 Analog IC Design 13 Loop gain T R2 R1 vo + + – vi – A (v(+) v( )) o + ECEN4827/5827 Analog IC Design 14 ECEN4827/5827 Mod el w ith finite op en -loop gain A o, rin and rou t + rout rin + – Ao(v(+) v( )) ECEN4827/5827 Analog IC Design 15 Mod el w ith finite op en -loop gain A o, rin and rou t + rout rin + – Ao(v(+) v( )) R2 R1 rout vo + rin + – vi – A (v(+) v( )) o + T rout rin 1 ACL ACL ideal 1 T rout R2 R1 || rin rin R1 1 T R1 || rin T Ao R1 || rin R2 rout ECEN4827/5827 Analog IC Design 16
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