ADVANCED CHIP MANUFACTURING WITH NEW MATERIALS. ASM International Analyst and Investor Technology Seminar Semicon West July 13, PDF

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ADVANCED CHIP MANUFACTURING WITH NEW MATERIALS ASM International Analyst and Investor Technology Seminar Semicon West July 13, 2016 CAUTIONARY NOTE Cautionary Note Regarding Forward-Looking Statements:
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ADVANCED CHIP MANUFACTURING WITH NEW MATERIALS ASM International Analyst and Investor Technology Seminar Semicon West July 13, 2016 CAUTIONARY NOTE Cautionary Note Regarding Forward-Looking Statements: All matters discussed in this press release, except for any historical data, are forward-looking statements. Forwardlooking statements involve risks and uncertainties that could cause actual results to differ materially from those in the forward-looking statements.theseinclude,butarenotlimited to, economic conditions and trends in the semiconductor industry generally and the timing of the industry cycles specifically, currency fluctuations, corporate transactions, financing and liquidity matters, the success of restructurings, the timing of significant orders, market acceptance of new products, competitive factors, litigation involving intellectual property, shareholders or other issues, commercial and economic disruption due to natural disasters, terrorist activity, armed conflict or politicalinstability,epidemicsandotherrisks indicated in the Company's reports and financial statements. The Company assumes no obligation nor intends to update or revise any forward-looking statements to reflect future developments or circumstances. 2 OUTLINE Exponentials in the industry New Materials and 3D: Moore s law enablers ASM and New Materials ALD as enabler of new materials ASM New Materials development strategy ALD supply chain components ASM Products and selected applications Summary and Conclusions 3 OUTLINE Exponentials in the industry New Materials and 3D: Moore s law enablers ASM and New Materials ALD as enabler of new materials ASM New Materials development strategy ALD supply chain components ASM Products and selected applications Summary and Conclusions 4 EXPONENTIALS IN THE INDUSTRY Moore s Law Density (xtor/chip) Memory Density (Mb/mm 2 ) Complexity (Mask Count) Top: G. Moore, Electronics (1965); Bottom: ASM; Techinsights and ASM (2013); 5 OUTLINE Exponentials in the industry New Materials and 3D: Moore s law enablers ASM and New Materials ALD as enabler of new materials ASM New Materials development strategy ALD supply chain components ASM Products and selected applications Summary and Conclusions 6 SCALING IS INCREASINGLY ENABLED BY NEW MATERIALS AND 3D TECHNOLOGIES IEDM 2002 Scaling enabled by Litho Patterning Spacers IEDM 2003 Scaling enabled by Materials IEDM 2007 Low-k Strained Si High-k High-mobility Materials Scaling enabled by 3D FinFET 3D TSV 3D Memory GAA Confidential and Proprietary Information 7 SCALING BY MATERIALS AND 3D 2011 SiGe Si Density scaling (continuing Moore s law) driving towards higher mobility materials and alternate device architectures Future systems will integrate much wider variety of materials and device structures ~2023 8 NEW MATERIALS AND PROCESSES: MOORE S LAW ENABLERS Higher Capacitance, Lower Leakage Higher Mobility, Lower Resistance High-k / Metal Gate S/D contact High-k / metal gate DRAM, RF, decoupling capacitors Less Cross Talk, Faster Interconnect (C) Intel STI Si STI Strain and new Channel Materials New metal contacts Smaller Feature Sizes Mitard et al., VLSI 16 SDQP for N7 and N5 (Porous) Low-k Materials Improved Metals E. Altamirano-Sánchez et al., SPIE Newsroom, 14 May 16 9 NEW MATERIALS: MOORE S LAW ENABLERS ssoi/geoi Ge IL (IL: Interface Layer) III V IL * GaN (PM: Patterning Materials) InSb InGaAs Ge STO Ru Other PM's EUV Other PM's EUV Co Co Si(C)P Si(C)P FDSOI FDSOI SiC SiC Air Air SiCO SiCO LaO LaO LT SiO LT SiO SiCN SiCN SiCN TiAlC MG TiAlC MG TiAlC MG ZrO ZrO ZrO Hf(Si)O Hf(Si)O Hf(Si)O AlO AlO AlO psioc psioc psioc SOI SOI SOI SiGe(B) SiGe(B) SiGe(B) TaO TaO TaO TaO SOG SOG SOG SOG SiOC SiOC SiOC SiOC Ta/TaN Ta/TaN Ta/TaN Ta/TaN Cu Cu Cu Cu SiOF SiOF SiOF SiOF TiSi TiSi TiSi TiSi TiSi PtSi PtSi PtSi PtSi PtSi TiW TiW TiW/TiN TiN TiN TiN WSi, MoSi WSi, W WSi, W W W W BPSG BPSG BPSG BPSG BPSG BPSG BPSG Patterning Related BEOL FEOL Starting Materials (*): Projection Al Al Al Al Al Al Al Al SiO, SiN SiO, SiN SiO, SiN SiO, SiN SiO, SiN SiO, SiN SiO, SiN SiO, SiN Si Si Si Si Si Si Si Si (*) 10 10 OUTLINE Exponentials in the industry New Materials and 3D: Moore s law enablers ASM and New Materials ALD as enabler of new materials ASM New Materials development strategy ALD supply chain components ASM Products and selected applications Summary and Conclusions 11 ASM AND NEW MATERIALS ASM technology focuses on enabling new materials and new device integration roadmaps 3D transistor formation (FinFET & beyond FinFET) DRAM, Flash planar and 3D NAND - and emerging memory More than Moore / IoT applications (MEMS, Sensors, Power) ALD (Atomic Layer Deposition) separates reactive precursors in time (or space), and grows materials one atomic layer at a time Superb control of uniformity, quality, and composition Conformal to any topography Enabling high quality materials at lower temperatures high-k metal gates low temp spacers for multi-patterning Other emerging applications 12 ALD AS ENABLER OF NEW MATERIALS - KEY STRENGTHS OF ALD Uniformity Step Coverage 42nm AlN 30.5 nm AlN 0.51% % Full range 43nm Interface Control Composition Control Atomically engineered interfaces to optimize leakage current, reliability and work-functions Ritala, E/Pcos 2012; Excellent composition control for ternary alloys; all ALD solution demonstrated for GST 13 CRITICAL ALD SUPPLY CHAIN COMPONENTS Fundamental Capability Process Performance Productivity Integrated Process Final Product Capability Pre-cursors Reactors High productivity tools Pre-cursor Delivery, Valves and Vessels Fab facilities, pumps & abatement 14 OUTLINE Exponentials in the industry New Materials and 3D: Moore s law enablers ASM and New Materials ALD as enabler of new materials ASM New Materials development strategy ALD supply chain components ASM Products and selected applications Summary and Conclusions 15 ASM PRODUCTS ALD Pulsar XP ALD for high-k Cross-flow reactor Solid source delivery system EmerALD XP ALD for metal gates Pulsar XP Showerhead reactor EmerALD XP 16 16 FINFET CHALLENGES: ALD ENABLES FURTHER SCALING IN 3D Source: Intel Materials properties and channel length must be uniform over fin height Conformal coverage required Aspect ratios increase going from 22nm to 14nm to 10nm ALD technology has become critical for HK and MG layers 17 EXTENDIBILITY OF HAFNIUM BASED OXIDES chipworks 45nm HK first RPMG Planar FET chipworks 32 nm HK last RPMG Planar FET chipworks 28nm HK first RPMG Planar FET chipworks 22nm HK last RPMG FinFET chipworks 14nm HK last RPMG FinFET 16 nm HK last RPMG FinFET 18 ASM PRODUCTS PEALD AND PECVD XP8-DCM High productivity single wafer tool for both PEALD and PECVD applications Accommodates up to 8 chambers by DCM PEALD and PECVD can be integrated on the same platform DCM (Dual Chamber Module) 19 ALD ENABLING LITHOGRAPHY: SPACER DEFINED DOUBLE/QUADRUPLE PATTERNING 80nm Pitch: P 40nm Hard Mask Etch Pitch: 1/2 P ALD SiO2 on resist In-situ trimming PEALD SiO2 Spacer Anisotropic Etch 2 nd ALD Spacer 2 nd Anisotropic Etch Spacer Defined Double Patterning (SDDP) with ALD in production since 3x nm DRAM and Flash Spacer Defined Quadruple Pattering (SDQP) in production for 1x nm Flash SDDP/SDQP qualified with 10nm Logic customers Pitch: 1/2 P 20nm Pitch: 1/4 P Key enablers brought by ALD Uniformity: CD control Low temperatures ( 100C) Good step coverage Dense film In-situ trimming capability Extendible to other materialswith etch selectivity 20 CD UNIFORMITY CONTROL Trimming SiO Deposition Arbitrary Units Cond A Cond B Cond C Arbitrary Units Position on wafer [mm] Position on wafer [mm] After lithography After trimming After SiO deposition & etch Critical Dimension Critical Dimension Critical Dimension Position on wafer Position on wafer Position on wafer WiW uniformity is controlled by trimming and deposition Trimming and deposition can mitigate the initial non-uniform resist pattern, which is to help within wafer CD uniformity 21 LINERS AND SPACERS FOR BEYOND 15nm FinFETs ALD SiO 2 and Si 3 N 4 permanent spacers Low temperature (260 ~ 550 C) Conformal High quality (low WER, low leakage current) 40nm pitch ALD SiO ALD SiN 22 HIGH QUALITY SIO Single Wafer ALD Conformal thickness deposition is necessary for high-ar trench The film quality of the sidewall needs to be equal to that of top/blanket Deliver required electrical performance Potential Applications: IO gate SiO Si Fin Development of High-temperature ALD SiO 4. FinFET I/O Transistor Gate Oxide 23 METAL OXIDE ADVANCED HARD MASK FOR PATTERING ALD Mox Etching Hard Mask Low/Tunable stress capable Photo Resist Mox LT deposition: PR compatible Extension of etch selectivity portfolio Dry Etch Rate by Gas A (Arb. Units) SiO TiO SiO SiO/Mox mix Mox Dry Etch Rate by Gas B (Arb. Units) SiO TiO SiO SiO/Mox mix Mox 24 ADVANCED ALD DOPING FinFET requires conformal doping Limitations of conventional doping techniques like beam line: Low conformality (beam directionality, shadowing effect) Silicon damage Ion beam Shadowing effect Hard Mask ALD Doping Benefits Conformal & no silicon damage SiO 2 Si BSG 2nm + cap 2nm 50nm un-doped region Si substrate Doped Oxide Anneal Oxide removal (Optional) Integration Concept 25 ASM PRODUCTS ADVANCED EPITAXY Advanced transistors enabled with Intrepid XP Relaxed & strained epitaxy for Si, SiGe & Ge based finfets through 5nm Channel, Source/Drain stressor, contact & passivation cap layers Integrated, low thermal budget pre-clean module High quality pre-epi surface with low interface contamination High productivity & lowest CoO XP Platform with up to 4 process modules Differentiated Epi film growth enabling devices with high drive currents & best-in-class productivity High throughput Epi processes with excellent uniformity, low defects & high doping levels Intrepid XP 26 26 EPI Si:P PROCESS Epitaxial SiP film for nmos finfets Key Challenges Good Epi process selectivity High P doping levels ( 1E21 at/cm 2 ) for lower resistivity. P concentration requirement increases at each node. Thickness and dopant uniformity and repeatability Low defects Throughput, especially at lower temps Integrated preclean required for pre-epi surface control J. Tolle, et. al., ECS EPI LAYERS FOR POWER DEVICES B implant B implant B implant B implant PR mask 1 st layer Epi N+ Drain Multiple epi steps PR mask 4 th layer Epi 3 rd layer Epi 2 nd layer Epi 1 st layer Epi N+ Drain Power devices require multiple & thick Epitaxial films to withstand high breakdown voltages (600V ~ 800V) Breakdown voltage of the device dictates number of Epi layers needed Doping level and uniformity of the Epi layers is critical and an ASM advantage In HVM at several power device manufacturers on 200 and 300mm 28 28 ASM PRODUCTS FURNACE CVD /DIFFUSION /BATCH ALD A412 PLUS Dual boat/dual reactor system Clustering of different applications between reactors possible only vertical furnace in the market with this capability Up to 150 product wafer load size Stocker design with integrated N2-FOUP purge and 36 FOUP positions A400 for IoT and More than Moore Dual boat/dual reactor system No defects No pattern collapse No line wiggling Applications: Full range of applications for Logic, Memory, Power and MEMS LPCVD Silicon, SiN, TEOS, HTO Diffusion, Anneal, Cure, Reactive Cure Batch ALD (AlO, AlN, TiN, SiN, SiO, etc) 29 A400/A412 FURNACE - INNOVATION Example 1: Voidless silicon gapfill. Voidless gapfill of rectangular trenches is a challenge for technologies beyond 10nm Standard silicon gap fill: Void Example 2: Etch stop layers (ESL) Future nodes with complex patterning require advanced ESL with high etch selectivity towards Si, SiO and SiN ESL (A** in figure below) was developed that protects substrate even for complex schemes: As deposited Etch1 Etch2 Etch3 ASM solution. Voidless gap fill even for narrow widths, with high throughput: A (ESL) Substrate NOK; Substrate attacked Substrate 35 nm 16 nm A* (ESL) Substrate A* (ESL) Substrate OK A* (ESL) Substrate NOK; Substrate attacked Substrate A** (ESL) A** (ESL) OK A** (ESL) OK A** (ESL) OK Substrate Substrate Substrate Substrate 30 WAFER FAB EQUIPMENT FORECAST Wafer Fab Equipment by Node Advanced nodes: market segments with high expected growth $B nm and below 10 nm 14 nm 22 nm 32 nm 45 nm 65nm & above Gartner July, 2016 Key customer ALD penetrations in advanced nodes: market segments with high expected growth 31 31 OUTLINE Exponentials in the industry New Materials and 3D: Moore s law enablers ASM and New Materials ALD as enabler of new materials ASM New Materials development strategy ALD supply chain components ASM Products and selected applications Summary and Conclusions 32 SUMMARY AND CONCLUSIONS Scaling is increasingly enabled by new materials and 3D technologies ALD enables new materials and 3D Hafnium based ALD high-k gates on ASM Pulsar extendable for 4 device generations ALD patterning films portfolio extended with metal oxide hardmasks ALD Doped oxides solution for fin doping High quality liners, spacers enabled by ALD Intrepid XP, system with up to 4 Epi reactors, targeting strained Epi layers for CMOS, and Epsilon 3200 for analog/power ASM s Vertical Furnace is providing high productivity, in combination with continued process innovation 33 34
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