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Selective Harmonic Elimination for a Single-Phase 13-level TCHB Based Cascaded Multilevel Inverter Using FPGA Wahidah Abd. Halim†,**,*** Nasrudin Abd. Rahim** and Maaspaliza Azri*,**,*** ** Fac. of Electrical Eng., Universiti Teknikal Malaysia Melaka, Melaka, Malaysia UM Power Energy Dedicated Advanced Centre (UMPEDAC), University of Malaya, Kuala Lumpur, Malaysia *** Dept. of Electrical Eng., Fac. of Eng., University of Malaya, Kuala Lumpur, Malaysia †* Abstract This paper presents an implem
  Selective Harmonic Elimination for a Single-Phase 13-level TCHB Based Cascaded Multilevel Inverter Using FPGA Wahidah Abd. Halim †,**,***  Nasrudin Abd. Rahim **  and Maaspaliza Azri *,**,***   † * Fac. of Electrical Eng., Universiti Teknikal Malaysia Melaka, Melaka, Malaysia **  UM Power Energy Dedicated Advanced Centre (UMPEDAC), University of Malaya, Kuala Lumpur, Malaysia ***  Dept. of Electrical Eng., Fac. of Eng., University of Malaya, Kuala Lumpur, Malaysia Abstract This paper presents an implementation of selective harmonic elimination (SHE) modulation for a single-phase 13-level transistor-clamped H-bridge (TCHB) based cascaded multilevel inverter. To determine the optimum switching angle of the SHE equations, Newton-Raphson method is used in solving the transcendental equation describing the fundamental and harmonic components. The proposed SHE scheme used relationship between the angles and a sinusoidal reference waveform based on voltage-angle equal criteria. The proposed SHE scheme is evaluated through simulation and experimental results. The digital modulator based-SHE scheme using field-programmable gate array (FPGA) is described and has been implemented on Altera DE2  board. The proposed SHE is efficient in eliminating the 3 rd  , 5 th , 7 th , 9 th  and 11 th  order harmonics, validating the analytical results. From the results, the adopted 13-level inverter produce higher quality with better harmonic profile and sinusoidal shape of stepped output waveform. Key words:  Pulse-width modulation, multilevel inverter, total harmonic distortion (THD), field-programmable gate array (FPGA) I.   I  NTRODUCTION   Multilevel inverter technology has drawn tremendous interest among researchers from industry and academia in recent years due to their superior performance. In contrast to conventional two-level inverter, they are more efficient and more suited for applications requiring high power and high voltage level. Among various types of multilevel inverter topologies, cascaded H-bridge (CHB) has attracted special attention due to its modular structure, which provides high reliability and better fault tolerance. Increasing the number of levels is also easier with minimum modification in hardware and control algorithm. Therefore, CHB multilevel inverter has  become popular in renewable energy (solar/wind power inverters), reactive power compensation (STATCOM) and motor-drive applications up to MegaWatt (MW) power levels [1-6]. For these applications, the converter’s output voltage must fulfill the requirement for maximum voltage and current THD as specified in IEEE Std.519-1992 [7]. It is essential to produce an effective power converter from the perspective of cost, efficiency and output quality. These factors have leads for emerging a new family of multilevel inverter known as transistor-clamped converter (TCC) [5, 8]. By adding additional devices (such as power switch, power diode and capacitor) to an existing H-bridge topology, it is  possible to increase the number of output voltage levels and  produce a better sinusoidal output waveform. The TCC has reduced number of dc power supplies and switches compared to that of conventional CHB topology designed for the same number of voltage level. Modulation strategy has a profound impact on the  performance of multilevel inverters, as it determines the switching losses as well as the voltage and current harmonics. Generally, the multilevel modulation strategies can be classified according to the switching frequency, into two categories: high-frequency switching and low-frequency (fundamental frequency) switching methods. The most popular modulation schemes discussed in the literature for multilevel inverter are multireference/multicarrier-based PWM [4, 5, 9, 10], multilevel space-vector PWM (SVM) [11, 12] and multilevel selective harmonic elimination (SHE) [7, 13]. Multilevel carrier-based PWM and SVM techniques are considered high-switching frequency schemes, whereas SHE falls within the low-switching frequency group. Each solution has its unique advantages and drawbacks, hence the choice of modulation technique usually depends on the inverter topology and its application. Among the many modulation strategies, SHE is commonly adopted in high power applications where switching frequency has to be low enough to minimize switching losses. Since the  effectiveness of SHE method depends heavily on the switching angle, various algorithms have been developed for determining the optimum switching angles [14, 15]. Usually, this is done offline, using optimization technique such as Newton-Raphson (NR) method [14-17]. More complex techniques such as the genetic algorithm (GA) [15, 18-20] and particle swarm optimization (PSO) [15, 21, 22] have also been demonstrated. Although these new techniques are fast in solving the optimized angle, the solutions only minimize the harmonics rather than eliminating them. Moreover, as prerequisite, the engineers need to understand advance control and mathematics algorithms [6]. More recently, online methods have been proposed where real-time calculations of the switching angles are made  possible using high speed processor. In [23], mathematical   calculation based on trigonometric function was proposed to obtain the switching angles. In [24], a simple and improved real-time algorithm for calculating the switching angle has  been introduced and then proven by mathematical derivation. In [6], the authors have proposed four-equations method based on harmonic injection and equal area criteria, regardless of the number of inverter output level. An artificial neural network (ANN) was used for obtaining the optimal switching angles for multilevel inverter in solar application in [3]. However, due to the simplification used, the online methods cannot fully eliminate the harmonics. Hence, they generally yield significantly higher THD are inferior to the offline methods. SHE analysis for 5-level up to 13-level CHB inverter with unequal dc sources considering for minimum THD with or without elimination of the lowest order harmonics are discussed in [25]. However, the real implementation results are discontinued for 11- and 13-level cases. For 13-level case, only simulation studies have been reported so far [26]. Here in this  paper, real implementation of SHE method on 13-level inverter is demonstrated.  Normally, digital implementation of SHE modulation involves two steps. First, the switching angles are calculated offline through solving a set of non-linear and transcendental equations. Then, the switching angles are stored in look-up table (LUT) for real-time applications [27]. In order to implement real-time control system in power electronics applications, the system designers have many choices. Microcontrollers, microprocessors and DSPs are software-based devices, which come with efficient software compilers and the program is usually written in C or assembly language. Although these technologies are matured and usually have dedicated PWM generation blocks, they have limited sampling rate and limited speed due to its natural sequence  based operation (the program is executed line by line, not simultaneously). This limitation can be resolved with field-programmable gate array (FPGA) as an alternative to  programmable logic device (PLD) and application specific integrated circuit (ASIC) technologies. FPGAs are digital hardware-based devices and now an increasingly popular technology in digital prototyping for multilevel inverter [15, 28] due to their speed and flexibility. In this paper, SHE modulation is suggested for a 13-level transistor-clamped H-bridge (TCHB) inverter based cascaded multilevel inverter topology. Newton-Raphson method is used to calculate the switching angles with the capability to eliminate the lowest order harmonics while maintaining the fundamental component. In order to generate an optimum stepped output waveform, a simple SHE modulation is defined according the voltage-angle equal criteria. Real implementation of SHE modulation for the TCHB inverter using FPGA is  presented. The analytical results are validated using both simulation and experimental results. II.   T HE P OWER C IRCUIT   Fig. 1 shows the studied inverter configuration based on 5-level transistor-clamped H-bridge (TCHB) multilevel inverter. The 5-level TCHB is modified by adding one  bidirectional switch to the H-bridge module. A very attractive feature of the bidirectional switch is that it allows bidirectional current flow and enables five output voltage levels of 0, ±½ V   DC    and ± V   DC  . Even though such topology has been discussed in [9], SHE modulation method is used instead of multicarrier modulation method. The inverter is supplied by three independent dc sources, three H-bridge modules and three bidirectional switches to  produce a 13-level output. Multiple dc sources at the input of the inverter may be obtained from constant dc supplies, LoadV DC V DC V DC C 1 C 2 C 3 C 4 C 5 C 6 S 11  S 12 S 13  S 14 S 15 S 21  S 22 S 23  S 24 S 25 S 31  S 32 S 33  S 34 S 35 LR+Vinv-+Vo-Io+V L1 -+V L2 -+V L3 -  Fig. 1. The 13-level TCHB based cascaded multilevel inverter topology.   batteries, super capacitors, pv or fuel cells. Generally, the number of output levels for the inverter is given by 4 i  + 1, where i  is the number of TCHB cells. Through combinations of the on state of the switches ( S  i 1 - S  i 5 ), the cell output voltage V  i   can be expressed as { } 43215 2124  )( iiiiiii DC i  S S S S S S S V V   −⋅−+−=  (1) The modes of operation, the switches to be turned on and the corresponding output voltage levels are summarized in Table I. The 13-level TCHB inverter’s operation involves 14 switching states, and all the operating states are illustrated in Fig. 2. In order to justify the use of the TCHB inverter,  performance comparisons are made against the conventional CHB inverter with the same 13-level voltage outputs. In general, the output voltage quality for both inverters is the same. The most obvious advantage of the adopted inverter has fewer component count compared to the CHB inverter with the same number of output level. This will result in lower total power losses produced by the TCHB inverter as compared to the CHB inverter [5]. Since CHB inverter requires two series connected cells to produce 5 voltage levels, a total of 24 switches are needed to generate 13-level voltage. In contrary, the TCHB inverter requires only 15 switches to produce the same number of voltage levels. Moreover, the provision of isolated sources is the main disadvantage of the CHB topology. In this case, a total of six isolated dc sources is needed for CHB, whereas the TCHB inverter requires three isolated dc sources. Owing to a  bidirectional switch connected at the midpoint of the dc link to the TCHB inverter output, both topologies required six capacitors. However, a larger value of capacitance is required in the TCHB inverter to prevent the capacitor voltage imbalance [5], [9]. A few practical approaches to balance the capacitor voltages are by replacing capacitors with isolated dc sources, applying back-to-back intertie system [29] or use of auxiliary dc-dc converter circuits [30]. It is expected that the overall cost of the TCHB inverter will be lower than that of the conventional CHB inverter due to the reduced switch count and lower number of isolated dc sources required. III.   B ACKGROUND AND S OLUTION FOR SHE   M ODULATION  A. Harmonic elimination technique In general, the inverter output voltage V  inv  waveform (see Fig. 3) can be expressed in Fourier series as TABLE   I S WITCHING S TATES AND V OLTAGE L EVELS OF THE 13-L EVEL  TCHB   I  NVERTER    States S 11  S 12  S 13  S 14  S 15  S 21  S 22  S 23  S 24  S 25  S 31  S 32  S 33  S 34  S 35  V  inv   1 1 0 0 1 0 1 0 0 1 0 1 0 0 1 0 3 V   DC   2 1 0 0 1 0 1 0 0 1 0 0 0 0 1 1 2½ V   DC   3 1 0 0 1 0 0 0 0 1 1 0 0 0 1 1 2 V   DC   4 0 0 0 1 1 0 0 0 1 1 0 0 0 1 1 1½ V   DC   5 0 0 0 1 1 0 0 0 1 1 0 0 1 1 0 V   DC   6 0 0 0 1 1 0 0 1 1 0 0 0 1 1 0 ½ V   DC   7 0 0 1 1 0 0 0 1 1 0 0 0 1 1 0 0 8 1 1 0 0 0 1 1 0 0 0 1 1 0 0 0 0 9 0 1 0 0 1 1 1 0 0 0 1 1 0 0 0 -½ V   DC   10 0 1 0 0 1 0 1 0 0 1 1 1 0 0 0 - V   DC   11 0 1 0 0 1 0 1 0 0 1 0 1 0 0 1 -1½  V   DC   12 0 1 1 0 0 0 1 0 0 1 0 1 0 0 1 - 2 V   DC   13 0 1 1 0 0 0 1 1 0 0 0 1 0 0 1 -2 ½  V   DC   14 0 1 1 0 0 0 1 1 0 0 0 1 1 0 0 -3  V   DC   
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