Datasheet. Serial-in / Parallel-out Driver Series 2-input I 2 C-bus Serial in/parallel out Drivers BU2098F - PDF

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Datasheet Serial-in / Parallel-out Driver Series 2-input I 2 C-bus Serial in/parallel out Drivers BU2098F Description BU2098F is an open drain output incorporates a built-in shift register and
Datasheet Serial-in / Parallel-out Driver Series 2-input I 2 C-bus Serial in/parallel out Drivers BU2098F Description BU2098F is an open drain output incorporates a built-in shift register and a latch circuit to control a maximum of 8 outputs by a 2-line interface, linked to a microcontroller. An open drain output provides maximum 25mA current. Key Specifications Power supply voltage range: 2.7V to 5.5V Output voltage: 0V to 15V Operating temperature range: -40 to +85 Features LED can be driven directly 8 Bit parallel output This product can be operated on low voltage Compatible with I 2 C-bus *I 2 C-bus is a trademark of NXP Semiconductors. Package SOP16 W(Typ) x D(Typ) x H(Max) 10.00mm x 6.20mm x 1.71mm Applications Drive of LED Drive of Solenoid Drive of Relay Pin Configurations (Top View) A0 A1 A2 Q0 Q1 Q2 Q3 VSS 1 VDD SDA 14 SCL N.C. Q7 Q6 Q5 Q4 Block Diagrams SDA SCL A0 A1 A2 Power-On Reset I 2 C-bus Controller Shift Register 8bit Latch Write Buffer Q0~Q7 Product structure:silicon monolithic integrated circuit This product has no designed protection against radioactive rays 1/14 TSZ Pin Descriptions Pin No. Pin Name I/O Function 1 A0 I 2 A1 I Address input (internally pull-up) 3 A2 I 4 Q0 5 Q1 6 Q2 7 Q3 O Open drain output 8 - Ground 9 Q4 10 Q5 11 Q6 12 Q7 O Open drain output 13 N.C. - Non connected 14 SCL I Serial clock input 15 SDA I/O Serial data input/output 16 V DD - Power supply Absolute Maximum Ratings Parameter Symbol Limits Unit Power Supply Voltage V DD -0.5 to +7.0 V Input Voltage V IN -0.5 to V DD+0.5 V Output Voltage V O to V Operating Temperature T opr -40 to +85 C Storage Temperature T stg -55 to +125 C Power Dissipation P D 0.30 (Note 1) W (Note 1) Mounted on 70mm x 70mm x 1.6mm glass epoxy board. Reduce 3.0mW per 1 C above 25 C. Caution: Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over the absolute maximum ratings. Recommended Operating Conditions (T A=25, =0V) Parameter Symbol Limits Unit Power Supply Voltage V DD +2.7 to +5.5 V Output Voltage V O 0 to +15 V 2/14 Electrical Characteristics (unless otherwise noted, V DD=5V, =0V, T A =25 ) Parameter Symbol Limits Min Typ Max Input High-level voltage V IH 0.7V DD - - V Input Low-level voltage V IL V DD V Output Low-level voltage V OL V I OUT=10mA Input Low-level current I IL μa V IN=0 Input High-level current I IH μa V IN=V DD Output leakage current I OZ - - ±5.0 μa Static dissipation current I DD μa Unit Condition Output=High impedance V OUT=V DD Timing Characteristics (Unless otherwise noted, V DD=5V, =0V, T A =25 ) Parameter Symbol Fast mode I 2 C-bus Standard mode I 2 C-bus Min Max Min Max SCL clock frequency f SCL khz Bus free time between start-stop condition t BUS μs Hold time start condition t HD:STA μs Low period of the SCL clock t LOW μs High period of the SCL clock t HIGH μs Set up time Re-start condition t SU:STA μs Data hold time t HD:DAT μs Data set up time t SU:DAT ns Rise time of SDA and SCL t R C b ns Fall time of SDA and SCL t F C b ns Set up time stop condition t SU:STO μs Capacitive load for SDA line and SCL line C b pf Unit Waveform of Timing Characteristics SDA 90% 10% t BUS t HD:STA t SU:STA t HD:STA t SU:STO t R t F t LOW SCL 90% 10% P S S:Start Condition P:Stop Condition t HD:DAT t HIGH t SU:DAT S P Figure 1. Timing chart (SDA, SCL) 3/14 Test Circuits V DD R L =10kΩ +15V R L R L R L R L PatternGenerator R L R L R L R L V IH V IL Figure 2. Test Circuit of Input H/LVoltage V DD 8 SW PatternGenerator 1 I OUT V OL Figure 3. Test Circuit of Output L Voltage V DD I IH I IL + A V IN Figure 4. Test Circuit of Input H/LCurrent 4/14 Test Circuit - continued V DD + I DD A V DD 8 + I OZ A SW PatternGenerator 1 Figure 5. Test Circuit of Output Leak Current / Static Dissipation Current V DD R L =10kΩ +15V R L R L R L R L PatternGenerator R L R L R L R L V DD Figure 6. Test Circuit of Timing Characteristics 5/14 Power Dissipation [W] BU2098F Power Dissipation Power dissipation(total loss) indicates the power that can be consumed by IC at T A=25 C(normal temperature). IC is heated when it consumed power, and the temperature of IC chip becomes higher than ambient temperature. The temperature that can be accepted by IC chip depends on circuit configuration, manufacturing process, and consumable power is limited. Power dissipation is determined by the temperature allowed in IC chip(maximum junction temperature) and thermal resistance of package(heat dissipation capability). The maximum junction temperature is typically equal to the maximum value in the storage temperature range. Heat generated by consumed power of IC radiates from the mold resin or lead frame of the package. The parameter which indicates this heat dissipation capability(hardness of heat release)is called thermal resistance, represented by the symbol θ JA ( C/W).The temperature of IC inside the package can be estimated by this thermal resistance. Figure 11 shows the model of thermal resistance of the package. Thermal resistance θ JA, ambient temperature T A, maximum junction temperature T Jmax, and power dissipation P D can be calculated by the equation below: θ JA = (T Jmax - T A) / P D ( C/W) Derating curve in Figure 12 indicates power that can be consumed by IC with reference to ambient temperature. Power that can be consumed by IC with reference to ambient temperature. Power that can be consumed by IC begins to attenuate at certain ambient temperature. This gradient is determined by thermal resistance θ JA. Thermal resistance θ JA depends on chip size, power consumption, package, ambient temperature, package condition, wind velocity, etc even when the same of package is used. Thermal reduction curve indicates a reference value measured at a specified condition BU2098F 0.3 θ JA =( T Jmax - T A)/ P D ( C/W) Ambient 周囲温度 temperature Ta [ ] T A ( ) 0.2 Chip surface temperature T J( ) チップ表面温度 Tj [ ] Power dissipation P D (W) 消費電力 P [W] Ambient Temperature Ta [ C] Figure 7. Thermal resistance Figure 8. Derating Curve 6/14 Function 1. Serial Interfacce 1.1 Start condition The start condition is a HIGH to LOW transition of the SDA line while SCL is HIGH. 1.2 Stop condition The stop condition is a LOW to HIGH transition of the SDA line while SCL is HIGH. SDA SCL S Start condition Figure 9. Start / Stop condition P Stop condition 1.3 Acknowledge The master (µp) puts a resistive HIGH level on the SDA line during the acknowledge clock pulse. The peripheral (audio processor) that acknowledge has to pull-down ( LOW ) the SDA line during the acknowledge clock pulse, so that the SDA line is stable LOW during this clock pulse. The slave which has been addressed has to generate an acknowledgement after the reception of each byte, otherwise the SDA line remains at the HIGH level during the ninth clock pulse time. In this case the master transmitter can generate the STOP information in order to abort the transfer. clock for acknowledge SCL (from master) SDA (from master) SDA (from slave) S not confirm confirm ACK signal Figure 10. Acknowledge 7/14 Function continued 1.4 Write DATA Send the stave address from master following the start condition (S). This address consists of 7 bits. The left 1 bit (the foot bit) is fixed 0. The stop condition (P) is needed to finish the data transferred. But the re-send starting condition (Sr) enables to transfer the data without STOP (P). S slave address R/W ACK DATA ACK P 0 (Write) S slave address R/W ACK DATA ACK Sr slave address R/W ACK DATA ACK P 0 (Write) 0 (Write) Figure 11. DATA transmit 1.5 Data format The format is following. S A6 A5 A4 A3 A2 A1 A0 R/W ACK D7 D6 D5 D4 D3 D2 D1 D0 ACK P SLAVE ADDRESS WRITE DATA Figure 12. Data format Slave address Write Data Table 1. for WRITE format A0 to A2 Each bit can be defined by the input levels of pins A0 to A3. A3 to A6 These 4 bits are fixed. R/W 0 D0 to D7 Write 1 to D0 makes Q0 pin High-impedance. And write 0 makes Q0 pin LOW. D[1:7] and Q[1:7] are same as D0 and Q0. Table 2. for (A2, A1, A0) to SLAVE ADDRESS A6 A5 A4 A3 A2 A1 A0 Slave address H H AH BH CH DH EH FH Fixed for BU2098F Defined by external pin A0~A2 8/14 Datasheet Function continued 2. Function of Power Supply is turning ON 2.1 Reset Condition After power on reset, open drain outputs of Q0 to Q7 pins are ON condition. Then, the outputs becomes Low voltage when pull-up resistor is connected. 2.2 Rising Time of Power Supply V DD must rise within 10ms. (t START ) If the rise time would exceed 10ms, it is afraid not to reset. 90% 10% t START 10ms Figure 13. Rising time of power supply Timing Chart Slave address Device code External terminal SCL Start condition SDA Stop condition V DD A6 A5 A4 A3 A2 A1 A0 RW ACK D7 D6 D5 D4 D3 D2 D1 D0 ACK Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Diagram shows a status where a pull-up resistor is connected to open drain output. Figure 14. Timing chart 9/14 I/O Equivalence Circuits A0 to A2 Q0 to Q7 VDD VDD VDD Q0 to Q7 A0 to A2 VSS VSS VSS VSS SDA SCL VDD VDD SDA SCL VSS VSS VSS VSS VSS 10/14 Operational Notes 1. Reverse Connection of Power Supply Connecting the power supply in reverse polarity can damage the IC. Take precautions against reverse polarity when connecting the power supply, such as mounting an external diode between the power supply and the IC s power supply pins. 2. Power Supply Lines Design the PCB layout pattern to provide low impedance supply lines. Furthermore, connect a capacitor to ground at all power supply pins. Consider the effect of temperature and aging on the capacitance value when using electrolytic capacitors. 3. Ground Voltage Ensure that no pins are at a voltage below that of the ground pin at any time, even during transient condition. 4. Ground Wiring Pattern When using both small-signal and large-current ground traces, the two ground traces should be routed separately but connected to a single ground at the reference point of the application board to avoid fluctuations in the small-signal ground caused by large currents. Also ensure that the ground traces of external components do not cause variations on the ground voltage. The ground lines must be as short and thick as possible to reduce line impedance. 5. Thermal Consideration Should by any chance the power dissipation rating be exceeded the rise in temperature of the chip may result in deterioration of the properties of the chip. In case of exceeding this absolute maximum rating, increase the board size and copper area to prevent exceeding the P D rating. 6. Recommended Operating Conditions These conditions represent a range within which the expected characteristics of the IC can be approximately obtained. The electrical characteristics are guaranteed under the conditions of each parameter. 7. Inrush Current When power is first supplied to the IC, it is possible that the internal logic may be unstable and inrush current may flow instantaneously due to the internal powering sequence and delays, especially if the IC has more than one power supply. Therefore, give special consideration to power coupling capacitance, power wiring, width of ground wiring, and routing of connections. 8. Operation Under Strong Electromagnetic Field Operating the IC in the presence of a strong electromagnetic field may cause the IC to malfunction. 9. Testing on Application Boards When testing the IC on an application board, connecting a capacitor directly to a low-impedance output pin may subject the IC to stress. Always discharge capacitors completely after each process or step. The IC s power supply should always be turned off completely before connecting or removing it from the test setup during the inspection process. To prevent damage from static discharge, ground the IC during assembly and use similar precautions during transport and storage. 10. Inter-pin Short and Mounting Errors Ensure that the direction and position are correct when mounting the IC on the PCB. Incorrect mounting may result in damaging the IC. Avoid nearby pins being shorted to each other especially to ground, power supply and output pin. Inter-pin shorts could be due to many reasons such as metal particles, water droplets (in very humid environment) and unintentional solder bridge deposited in between pins during assembly to name a few. 11. Unused Input Pins Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the power supply or ground line. 11/14 Operational Notes - continued 12. Regarding the Input Pin of the IC In the construction of this IC, P-N junctions are inevitably formed creating parasitic diodes or transistors. The operation of these parasitic elements can result in mutual interference among circuits, operational faults, or physical damage. Therefore, conditions which cause these parasitic elements to operate, such as applying a voltage to an input pin lower than the ground voltage should be avoided. Furthermore, do not apply a voltage to the input pins when no power supply voltage is applied to the IC. Even if the power supply voltage is applied, make sure that the input pins have voltages within the values specified in the electrical characteristics of this IC. 13. Ceramic Capacitor When using a ceramic capacitor, determine the dielectric constant considering the change of capacitance with temperature and the decrease in nominal capacitance due to DC bias and others. Ordering Information B U F - E 2 Part Number Package F: SOP16 Packaging and forming specification E2: Embossed tape and reel Marking Diagrams SOP16(TOP VIEW) B U F LOT Number 1PIN MARK 12/14 Physical Dimension, Tape and Reel Information Package Name SOP16 (Max (include.burr)) (UNIT : mm) PKG : SOP16 Drawing No. : EX /14 Revision History Date Revision Changes 11.Oct New Release 01.Sep Page.9 Function:2.1 Reset Condition (Open drain outputs after reset:hi-z Condition ON Condition) Page.9 Timing Chart:Open drain outputs after V DD is ON (Outputs condition:all High All Low) 14/14 Datasheet Notice Precaution on using ROHM Products 1. Our Products are designed and manufactured for application in ordinary electronic equipments (such as AV equipment, OA equipment, telecommunication equipment, home electronic appliances, amusement equipment, etc.). If you intend to use our Products in devices requiring extremely high reliability (such as medical equipment (Note 1), transport equipment, traffic equipment, aircraft/spacecraft, nuclear power controllers, fuel controllers, car equipment including car accessories, safety devices, etc.) and whose malfunction or failure may cause loss of human life, bodily injury or serious damage to property ( Specific Applications ), please consult with the ROHM sales representative in advance. Unless otherwise agreed in writing by ROHM in advance, ROHM shall not be in any way responsible or liable for any damages, expenses or losses incurred by you or third parties arising from the use of any ROHM s Products for Specific Applications. (Note1) Medical Equipment Classification of the Specific Applications JAPAN USA EU CHINA CLASSⅢ CLASSⅡb CLASSⅢ CLASSⅢ CLASSⅣ CLASSⅢ 2. ROHM designs and manufactures its Products subject to strict quality control system. However, semiconductor products can fail or malfunction at a certain rate. Please be sure to implement, at your own responsibilities, adequate safety measures including but not limited to fail-safe design against the physical injury, damage to any property, which a failure or malfunction of our Products may cause. The following are examples of safety measures: [a] Installation of protection circuits or other protective devices to improve system safety [b] Installation of redundant circuits to reduce the impact of single or multiple circuit failure 3. Our Products are designed and manufactured for use under standard conditions and not under any special or extraordinary environments or conditions, as exemplified below. Accordingly, ROHM shall not be in any way responsible or liable for any damages, expenses or losses arising from the use of any ROHM s Products under any special or extraordinary environments or conditions. If you intend to use our Products under any special or extraordinary environments or conditions (as exemplified below), your independent verification and confirmation of product performance, reliability, etc, prior to use, must be necessary: [a] Use of our Products in any types of liquid, including water, oils, chemicals, and organic solvents [b] Use of our Products outdoors or in places where the Products are exposed to direct sunlight or dust [c] Use of our Products in places where the Products are exposed to sea wind or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2 [d] Use of our Products in places where the Products are exposed to static electricity or electromagnetic waves [e] Use of our Products in proximity to heat-producing components, plastic cords, or other flammable items [f] Sealing or coating our Products with resin or other coating materials [g] Use of our Products without cleaning residue of flux (even if you use no-clean type fluxes, cleaning residue of flux is recommended); or Washing our Products by using water or water-soluble cleaning agents for cleaning residue after soldering [h] Use of the Products in places subject to dew condensation 4. The Products are not subject to radiation-proof design. 5. Please verify and confirm characteristics of the final or mounted products in using the Products. 6. In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse. is applied, confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect product performance and reliability. 7. De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta). When used in sealed area, confirm the actual ambient temperature. 8. Confirm that operation temperature is within the specified range described in the product specification. 9. ROHM shall not be in any way responsible or liable for failure induced under deviant condition from what is defined in this document. Precaution for Mounting / Circuit board design 1. When a highly active halogenous (chlorine, bromine, etc.) flux is used, the residue of flux may negatively affect product performance and reliability. 2. In principle, the reflow soldering method must be used on a surface-mount products, the flow soldering method must be used on a through hole mount products. If the flow soldering method is preferred on a surface-mount products, please consult with the ROHM representative in advance. For details, please refer to ROHM Mounting specification Notice-PGA-E 2015 ROHM Co., Ltd. All rights reserved. Rev.001 Datasheet Precautions Regarding Application Examples and External Circuits 1. If change is made to the constant of an external circuit, please allow a sufficient margin considering variations of the characteristics of the Products and external components, including transient characteristics, as well as static characteristics. 2. You agree that application notes, reference designs, and associated data and information contained in this document are presented only as guidance for Products use. Therefore, in case you use such information,
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