The
33rd
Annual
Conferenceof
the
IEEE
Industrial
ElectronicsSociety
(IECON)
Nov.
58,
2007,
Taipei,
Taiwan
Modellingand
Regulation
of
DualOutput
LCLC
Resonant
Converters
Y.
Ang,
C.
M.
Bingham,
M.
P.
Foster,
D.A.Stone
Department
of
EEE,
The
University
of
Sheffield,Sheffield,
UK.
Email
c.binghamgsheffield.ac.uk
AbstractThe
analysis,
design
and
control
of
4th_order
LCLC
voltageoutput
seriesparallel
resonant
converters
(SPRCs)
for
the
provisionofmultiple
regulatedoutputs,
is
described.
Specifically,
statevariable
conceptsare
employedand
new
analysis
techniques
are
developed
to
establish
operating
mode
boundaries
with
which
to
describethe
internal
behaviour
of
a
dualoutput
resonant
converter
topology.
The
designer
is
guided
through
the
most
important
criteria
for
realising
a
satisfactory
converter,
and
the
impact
of
parameter
choices
on
performance
is
explored.
Predictions
from
the
resulting
models
are
compared
with
those
obtained
from
SPICE
simulations
and
measurements
from
a
prototype
power
supply
under
closed
loop
control.
I.
INTRODUCTION
With
the
increased
power
capability,
improved
control
and
reduced
cost
of
power
semiconductor
devices,
designers
of
electronic
equipment,
computers
and
electronic
instrumentation
are
increasingly
demanding
higher
energy
and
more
efficient
power
supplies.
Moreover,
thetrend
towards
miniaturisation
of
electronicsystems,particularly
for
communicationand
entertainmentproducts,
and
the
emergenceof
improved
power
switchtechnologies,
is
leading
to
the
use
of
switching
frequencies
in
the
100s
kHz
to
several
MHz
range.
To
improve
the
overall
power
density
of
resonant
power
supplies,
research
is
now
being
directed
towards
converter
topologies
that
can
providemultiple
regulated
outputsparticular
growth
areas
being
the
telecommunications,
computer
and
microprocessor
industries,
with
mobile
phones,
PDAs
and
handheld
products
typically
requiring3.3V,
5V,
±12V
and
±15V
supplies
for
various
interfaces.
However,
crossregulation
errors
that
accompany
output
load
variations,
which
manifests
itself
by
the
regulation
of
one
output
voltage
impacting
on
the
performance
of
others,
can
be
a
significant
limitation
for
voltage
sensitive
electronicsystems.
II.
MULTIOUTPUT
CONVERTERS
Todate,
several
approaches
havebeen
explored
to
addresscrossregulation,
complexity
and
overall
circuit
performance
issues
of
multioutput
converters,
the
solutions
being
divided
into
three
distinct
categories.
The
first
regulates
a
single
primary
output
using
closedloopfeedback,
with
theauxiliary
outputs
being
semiregulated
and,
therefore,
subject
tocross
regulation
error.
The
second
category
achieves
precise
post
regulation
ofeach
output
by
using
eitherlinear
regulators
or
hardswitched
dcdc
converters.
However,
although
relatively
straightforward
to
design,
such
circuits
are
rarely
used
in
practice
due
tocost
constraints.
The
third
category
is
specific
to
applications
which
require
only
two
regulated
outputs,
as
is
commonly
found
in
signal
processing
and
microprocessor
based
systems.
They
avoid
the
need
for
postregulation
by
utilising
two
closedloop
feedback
configurations.
A
3rdorder
LLC
converter
with
two
independently
controlled
outputs
was
reported
in
[1].
However,
optimum
performance
characteristics
have
yet
to
be
forthcoming,
primarily
due
to
the
significant
complexity
associated
with
the
highly
nonlinear
behaviour
between
the
various
outputs
as
a
function
of
load.
Nevertheless,
it
is
a
solution
that
broadly
falls
within
this
third
category
that
is
thesubject
of
this
paper.
Specifically,dualoutput
resonant
LCLC
converters,
are
considered,
with
control
ofeach
output
being
achieved
by
switching
the
power
devices
asymmetrically
over
each
half
switching
cycle
using
a
combination
of
PWM
and
frequency
control.
III.
DUAL
O/P
LCLCSPRC
MODELA
halfbridge
LCLCSPRC
with
two
outputs
is
shown
in
Fig.
1(a).
To
demonstrate
the
ability
of
the
converter
to
deliver
asymmetrical
output
voltages
under
balanced
load
conditions,
the
transformer
is
constrained
to
have
unity
turnsratios
for
both
outputs
and
the
high
and
lowside
parallel
resonant
capacitors
are
constrained
to
have
identicalvalues.
Since
current
flows
through
the
primary
side
of
thetransformer
to
the
top
and
bottom
sides
of
the
rectifier
during
different
half
cycles
of
tank
excitation,
see
Fig.
1
(b),
each
output
is
replenished
with
energy
alternately.IV.
PRINCIPLE
OF
OPERATION
To
achieve
zerovoltage
switching,
the
converter
is
assumed
to
operate
on
the
negative
gradient
of
the
inputoutput
frequency
characteristic,
above
the
primary
resonant
peak.
When
operating
in
this
region,
the
resulting
waveforms
can
be
sub
divided
into
two
distinct
time
intervals,
viz.
intervals
1
and
2,
as
depicted
in
Fig.
1(b):
Interval
1:
Clamping
of
the
parallel
capacitor
voltage.
Here,
the
combined
series
inductor
Ls+Llp
and
capacitor
Cs
provide
resonant
behaviour
whilstthe
voltage
across
the
effective
parallel
tank
inductor
and
capacitor
(Lp
(Lm)
and
Cp)
is
clamped
by
the
output
voltage.
As
the
current
through
the
series
inductor,
LS,
decays
to
zero,
Cp
begins
to
contribute
to
resonant
behaviour,
and
operation
enters
the
second
interval.
1424407834/07/ 20.00
C
2007
IEEE
2130
Luo
take
on
a
sinusoidal
characteristic.
Since
the
outputs
are
effectively
disconnected
from
thetank,
both
Cp1
and
Cp2
DI
contribute
to
resonant
behaviour.
Both
rectifier
currents
are
zero,
and
the
converter
outputs
are
in
an
idle
state
with
Rf1
lS
energy
being
supplied
solely
by
the
charge
on
the
filter
capacitors.
By
initially
neglecting
the
rectifier
onstate


voltage,
and
noting
that
the
effective
parallel
resonant
X
2i
R
2
capacitance
CL
is
the
sum
of
the
shunt
network
capacitances
W
C~p
and
C,2,
vcp1
during
the
capacitor
charging
period
is
described
by:
ST
SBAv_;
.1+_
(a)
t2
cp(t=
cpi
t,
)
+
i
n
sin(2)7,t)
dt
p
tl
where
lin
=iLSILp
Evaluating
(1)
with
initial
conditions
VR
(tl)
=
VCp1
(tl)
=
Vjut2
yields:
(1)
(2)
1i
t2
(b)Fig.1
Dualload
4th_order
resonantconverter
(a)
schematic
(b)
typical
operating
waveforms
Interval
2:
Decoupling
of
the
rectifier
and
output
filter.
Here,
all
the
t nk
components
contribute
to
resonant
behaviour,
with
the
rectifier
effectively
becoming
reverse
biased.
Current
into
both
the
high
and
lowsidediodes
remains
zero,
and
the
parallel
capacitors
are
charged
until
their
voltage
is
clamped
at
either
+V±
,,
or
V,,12,
thereby
providing
the
boundary
at
the
end
of
this
time
interval.
During
each
halfcycle
of
operation,
three
Modes,
Ml,
M2,
and
M3
can
be
identified,
as
shown
in
Fig.
1(b).
Circuit
Mode
Ml
(to
<
t
<
tl).
At
the
start
of
Ml,
SW2
is
turned
off
at
to
and
SWI
turned
on.
The
series
inductor
current,
iLs,
is
negative
and
flows
through
the
internal
diode
of
SWI,
thereby
facilitating
ZVS
of
SWI.
Also
during
this
period,
iLs
allows
D2
to
conduct
and
transfer
energy
to
support
VOW2,
whilstthe
voltage
on
Cp2
is
clamped
to
VoW2.
Allthe
rectifier
current,
therefore,
flows
to
the
load.
At
the
end
of
Ml,
the
rectifier
current
iR2
has
decayed
to
zero,
and
both
the
high
side
andlow
side
diodes,
and
the
output
filter,
are
effectively
decoupled
from
the
resonant
tank.Circuit
Mode
M2
(t
<
t
<t2).
Here,
the
series
resonant
inductorcurrent
iLs
becomes
positive.
Since
SWI
is
turned
on
during
Ml,
current
flow
is
now
through
SWI.
Initial
conditions
for
this
mode
are
that
iLs=O
and
Vcp2=
vout2
The
inductorcurrent
iLs
and
parallel
resonant
capacitor
voltages
The
boundary
for
the
end
of
thecapacitor
chargingperiod
is
VCpl(t2)
=
+Voutl,
which
yieldsthe
rectifier
nonconduction
angle,
Oc,
associated
with
a
positive
polarity
of
current,
iR,
through
the
high
side
rectifier:
t2
=
2
f
xcos
K
(0,C)cv
cos
(3)
where
vtot
=
vout,
+
Vout2
Circuit
Mode
M3
(
t2
<
t
<
TI
/2).
At
t
t2,
D1
becomes
forward
biased
whilst
D2
reverse
biased.
The
rectifier
diode
current
iR2
remains
zero
throughout
theduration
of
M3,
and
DI
clamps
the
capacitor
voltage
vcp,
to
+Vout±
until
iLs
decays
to
zero,
at
which
time
the
second
half
cycle
of
operation
commences.
For
50 0
dutycycle
excitation,
the2nd
halfcycle
of
operation
is
the
mirror
image
of
the
first.
However,
for
asymmetrical
excitation,the
output
rectifier
diode
(D2)
nonconduction
angle,
associated
with
the
series
resonant
inductor
current
being
of
negative
polarity,
is
given
by:
Sb2
co
K1
2zf
Cpvtoj
(4)
where
ii
(is
iLp).
The
voltage,
v
across
theparallel
resonant
capacitor
can,
therefore,
be
expressed
as
a
function
of
the
angle
0
see
Fig.
1(b):
for
K
2
+
2f
x
I
cos(9))
+
Vout2
voltl

2.in6
x
I
cos(o))
Vo,t2
=
...°
for
0=9
i..
for
0=
.+2
for
f
+
0c2
2i
(5)
2131
Llp*L
P44
r,;
,;T+C,921
I
cos(2zf

tl
))
vcp
I
(t2
)
V,,t
2
+
ii,
x
,
(t2
2zf,Cp
IR
Under
steadystate
conditions,the
mean
output
current
ioutl,
flowing
through
DI
towards
the
output
filter
and
load,
can
be
determined
from
the
mean
current
flowing
through
the
rectifier
when
it
is
of
positive
polarity.
Since
this
occurs
during
the
interval
Oc1
<
0
<
iz,
iout
is
given
by:
iol=X
ix
n
sin(O)dO
(6)
2
f
Substituting
(3)
into
(6)
and
evaluating
theintegral
provides
thesolution
for
ioutl
ioUtl
2
x
(1
+
COs(
1
))
=
p
tot
(7)
2yz
yz
Simple
mathematical
manipulation
of
(3)
and
(7)
then
gives
the
corresponding
rectifier
nonconduction
angle
c15c:
terms
are,
therefore,
obtained
by
equating
voltages
at
either
side
of
the
rectifier
for
each
respective
halfcycle:
vC.,
=
sgn(iL)(VOtj
+
vdiode)
sgn(iL)(vCf
1
+
Vdiode)
(13)
vCq2
sgn(iL
)(Vout2
+
Vdiode
)
sgn(iL
)(Vcf
2
+
Vdiode)
Assuming
a
constant
rectifier
voltage,
(12)
can
be
manipulated
to:
dvc,.1
dvcf
I
dC
dvcf
2
dt
sgn(iL)
dt
dt
sgn(iL)
dt
(14)
Considering
the
rectifier
current,
iR2,
to
be
zero
during
thepositive
halfcycle
of
the
parallel
capacitor
voltage,
the
rectifier
current
iRj,
is
given
from:
'L
RI
1Cp2
R2
=
sgn(iL
RI
Vcf
1
CpI
Cf
Cf
IRLI
(8)
VO,tl
is
determined
by
assuming
the
output
filter
capacitance
Cf
is
sufficiently
large
to
impart
negligible
output
voltage
ripple.
In
this
case:
vout
2
=
ioutIRLI
=
+(I+COS(f
=CV
(9)
Equations
(6)
to
(9)
can
be
further
manipulated
to
provide
the
complementary
D2
nonconduction
angle,
5c2,
and
the
output
current,
iout2,
and
output
voltage
Vo0t2,
as
follows:
iout2
2in
X
1
+
COS(0)2
,
VoW2
=
L2
X
'n
sC1)outl
(1
0)
2z
Z
I~~i
1+RLfICP
V.
STATEVARIABLE
ANALYSIS
A
statevariable
model
describing
the
behaviour
of
the
dualoutput
converter
can
be
obtained
by
considering
the
electrical
network
shown
in
Fig.
1
and
separating
the
dynamics
into
'fast'
and
slow
subsystems,
with
their
interactionrelated
by
a
set
of
coupling
equations.
The
fast
subsystem
is
considered
to
describethe
dynamics
of
the
resonant
tank
andpower
switches:
dvcs
iLs
diL
sKf
Vcs
VLpdiLp
VLp
dt
Cs
dt
Ls
dt
Lp
dvCpl
'Ls
1Lp
RI
tCp2
1R2
dvCp2
'Ls
1Lp
1R2
tCpl
RI
dt
Cpl
dt
Cp2
(11)
The
output
filter
dynamics
are
described
by:
dvcf
I

'RI
Vcf
1
dvcf
2
1R2
Vcf
2
(12)
dt
Cf1
CfIRLI
dt
Cf
2
Cf
2RL2
As
discussed,
during
interval
t1
4
t2
(seeFig.
1(b))
vcpl
is
clamped
to
vcf,
during
the
positivehalfcycle,
and
conversely,
to
vcf2
during
the
negative
halfcycle,
due
to
the
action
of
the
diodes.
By
noting
that
there
will
be
negligible
current
flowing
through
Cp
during
these
periods,
the
rectifier
input
voltage
is
dependent
on
the
direction
of
thecurrent
leaving
the
resonant
tank
inductances,
i.e.
iL
=
iLs
iLp
.
The
relevant
coupling
. i
C=plCf
I
iL
iCp2
iR2
Sgn(iL
)Vf
I
RI
sgn(iL)Cpl
Cfl
CpK
C+fl)Vl2
This
leads
to
the
following
coupling
equations
which
describethe
rectifier
currents
within
each
half
of
a
switching
cycle:
CpCl
1L
1Cp2
(R2
+
f
I
for
vQpl
Vout,
+
vdode
1.RI=
Sgn(iL)CPl±Cf1
Cfr
C
IRL
I
0
for
vcpl<Vout
+
vdiode
p2Cf2
riL
iR2

sgn(ZL
Cp2
Cf2
+sgn QL
qfr
2
C
C+'(L2
for
vCp2
=
Vout2
+
Vdode
cp2
Cf2RL2
0
for
VCp2
<
Vout2
+
Vdiode
(16)
Notably,
the
voltage
across
Lp,
can
be
considered
a
reflection
of
the
voltages
across
Cp1
and
Cp2,
and
the
state
vector
for
the
parallel
inductor
current
in
the
fast
subsystem
(see
(11))
simplifies
to
VLP
=
VCp
I
The
statevariable
equations
for
the
parallel
resonant
capacitor
voltage
(11)
can
be
simplified
to:
Cp
I
B
LsLp
iR
dvCp2
B
Lp
iR
(17)
dt
2Cp1
dt
2Cp2The
complete
statevariable
model
of
the
dualload
converter
(excluding
the
effects
of
output
leakageinductances)
is,
therefore,
given
by:
where
Fo3X3
A1
o2x37
x
=
A2
o2X2o2X2
x
B
02x302X2
A3
X
=VCpI
VCp2
VC,
Lp
'L,
VCf
IVCf2
2C1p2C1p
Fl0
0
Al
II
A2
Lp
1
2C2
2(
0
A
0
1
LL
j
C,
B
[
iR
_iR
01X2
Vin
1
R2
]
L2C
PI
2Cp2
L,
C
fl
Cf2
(18)
1
3=
C
RL
(19)
The
model
can
used
to
investigate
the
behaviourof
dualload
converters
when
subject
to
asymmetrical
input
excitation.
By
way
of
example,
the
parameters
of
a
candidate
converter
are
2132
(15)
I
)Ziouti
)7fscp
Vtot
oc,
Cos
Mout,
+
)7fsc
pVtot
given
in
Table
I
when
supplied
from
a
30V
dc
link.
A
plot
of
the
resultingsteadystateoutput
voltage
characteristics
of
the
converter,
Vf0t,
and
VW2,
as
a
function
of
switching
frequency
and
dutycycle
ratio
is
given
in
Fig.
2.
It
is
evident
thatfor
operation
above
resonance,
the
sum
of
the
output
voltagesapplied
to
the
loads
increases
as
the
operating
frequency
tends
to
the
effective
resonant
frequency,
for
fixed
values
of
dutycycle
ratio.
Furthermore,
for
a
50O
dutycycle,
giving
symmetric
squarewave
excitation
of
the
tank,
the
converter
delivers
identical
voltages
to
both
the
high
side
and
low
side
outputs,for
a
fixed
operatingfrequency,
as
expected.
For
a
given
operatingfrequency,
a
decrease
in
the
dutycycle
ratio,
from
500O,
is
seen
to
deliver
more
energy
from
the
resonant
tank
to
energize
output
V,,tl,
thereby
yielding
a
correspondingly
higher
output
voltage
and
power,
and
vice
versa.
It
is,
therefore,
clear
that
for
balanced
loads,
the
voltage
andpower
distribution
to
each
output
can
be
independently
influenced
by
asuitable
choice
of
duty
ratio
and
switching
frequency.
For
completeness,
Fig.
3
compares
the
ratio
of
the
two
realisable
output
voltages,
from
which
it
can
be
seen
that
the
slope
of
the
curve
is
greater
for
lower
values
of
switching
frequency.
This
implies
that
when
alarge
difference
between
the
output
voltages
is
required,the
converter
should
be
operated
close
to
resonance,
leading
to
high
efficiencyoperation,
and
zero
voltage
switching.
However,
this
also
means
that
the
tank
components
are
subjected
to
higher
electrical
stresses.
For
asymmetric
excitation
of
the
converter,
the
duties
of
SWI
and
SW2
are
denoted,
respectively,
by
D
and
1
D,
where
D
is
the
ratio
of
the
turnon
period
with
respect
to
the
switching
period.
Asymmetric
switching
therefore
provides
an
asymmetrical
voltage
source
Vin
to
excite
thetank,
of
amplitude
VDC:
Jn
{VDC
i

0=0...2zD
9
=
2zD
...2ff
Assuming
that
only
the
fundamental
component
excites
the
resonant
tank,
and
applying
therelationship
tan
(cos(o)/sin(O))
=T/2+0,
the
fundamentalof
the
input
voltage,
Vin 1),
and
its
phase
angle,
5vi l)
are
given
by:
Vi(=
DC1

cos(2)D)
x
sin(OX
+
vi 1))
vi(1)
=
2,I
(21)
The
condition
for
inductive
switching
can
now
be
written
as
A
nz(O.5D),
where,3in
is
the
phase
lag
between
the
fundamental
of
the
input
voltage
and
current).
TABLE
I
CONVERTERMODEL
PARAMETERS
ParametersValue
Characteristic
impedance
(Q)
2.5
Resonant
frequency,fj
(kHz)
130Resonant
capacitance
ratio,
C,
0.03
Resonant
inductance
ratio,
L,
0.01Series
loadquality
factor,
Q0p'
6
le
.
IS~
14

12
I
3
0
140
qu
Frequeny
(kHz)
20
[Duty
( )
Fig.2
Variation
of
output
voltage
distribution
withswitchingfrequency
and
dutycycle
ratio
Duty
P
Fig.3
Variationof
normalised
asymmetrical
output
voltagewith
switching
frequencyand
dutycycle
ratio
VI.
EXPERIMENTAL
RESULTS
Measured
results
havebeen
obtained
on
an
experimental
converter
with
a
stepdown
capability,
the
measuredcomponent
values
beinggiven
in
Table
II.
A
ferrite
core,
3F3,
suitable
for
highfrequency
applications,
wasused
for
both
the
transformer
core
and
the
resonant
inductor.
Since
the
transformer
leakage
inductances
are
dependent
on
the
winding
arrangement,
thesecondaries
were
bifilar
wound
adjacent
to
the
core,
beneath
the
primary
winding,
so
as
to
reduce
secondary
leakage
flux.
TABLE
II
PROTOTYPE
DUAL
OUTPUT
CONVERTERCOMPONENT
VALUES
Parameter
Value
DC
link
input
voltage,
VDC
(V)
15
Series
resonant
inductances,
L,
(,uH)
0.85
Series
resonant
capacitances,
C,
(,F)
1.5
High
sideparallel
resonant
capacitances,
CP1
(Ff)
0.116
Low
sideparallel
resonant
capacitances,
CP2
(,F)
0.116
Load
resistance,
RL
(Q)
4
Transformer
turns
ratio
1
Filter
capacitance,
Cf
(,F)
100
Transformer
output
leakage
inductance,
LI,
(,uH)
0.1
gnetising
inductance,
Lm
(,uH)
109Transformer
primary
leakage
inductance,
LIP
(,uH)
0.7
2133